The Threshold input is left open or can be Pulled Down.

The above circuit is a Bi-Stable latch using Trigger and Reset inputs of 555 Timer. When the Set input is high with Low Reset input, the output is set, i.e., High. The output of LC(Lower Comparator) which is Set input to RS Latch is High when the Trigger input is Low or Lesser than 1/3 Vcc, so it is Pulled High. When the Reset input is high with Low Set input to the latch, the output is Reset i.e., Low. The output of UC (Upper Comparator) which is Reset input to RS Latch is High when the Threshold input is High or Greater than 2/3 Vcc, so it is Pulled Down. The above circuit is a Bi-Stable latch using Trigger and Threshold inputs of 555 Timer. As the S and R inputs are controlled by the outputs of the Op-Amps with trigger and threshold inputs under the normally open state of the switches the outputs of Op-Amp are such that R, S inputs are 0,0 i.e., LOW state for which, the output of the RS Latch remains in the previous state. The output is set or reset with the momentary inputs applied at these inputs. The RS Latch in the 555 Timer can be used with the Reset and Trigger inputs. 555-Timer in Proteus 555-Timer as a Bistable Latch Inverting Buffer in the output stage inverts the output of Latch and drives the load.

The inverted output of Latch turns ON/OFF the discharge transistor. The RS Latch has an external Reset input which provides the option to reset the output instantaneously. The output of UC is given as R input of RS Latch and output of LC is given as S input of RS Latch. The Upper comparator-UC is a Non-Inverting comparator, compares the input signal with 2/3Vcc and Lower comparator-LC is an Inverting comparator, compares input with 1/3 Vcc.

Ir sensor simulation in proteus